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 Digital designers are used to working with parallel buses and system clock speeds around 100 to 200 MHz. A wide variety of standards, practices, and tools support them. However, today's focus is on embedded test and high-speed (multi-gigabit) serial. The challenge is to develop methods to accurately probe, capture, view, measure, and analyze high frequency signals — testing data signal integrity as transmitted through common cables, backplanes and PC board materials. The first step is to understand how designing a digital high-speed serial interface differs. Some design teams use embedded test and engineers skilled in the physics of high-speed signal transmission (signal integrity). How do you plan to handle this very different type of design problem?
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