Adapt Boundary Scan to Today's Challenges

Getting electronic device designers to embrace incorporating boundary-scan techniques into the silicon that they create has always been met with considerable resistance. Designers insisted that the (largely undocumented) cost, real estate, and time-to-market implications of taking this extra step defy justification. Two decades later, iNEMI is exploring how to increase acceptance, and IEEE is debating 1149.7 intended to carry the principle into the latest technologies. How often do you implement boundary scan? What is the impact on the design cycle? How have your vendors reacted? Your designers? How does the new standard affect your current and future product plans?

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