ECL logic

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R. Becker Participant Join Date: May 2008 Posts: 4	ECL logic 05/13/2008 2:21 PM
	I am attempting to modify a simple ECL to TTL translator circuit to use Fairchild 100325 PLCC IC's. Unfortunately, the PLCC chip has "VEES" inputs at pins 8, 15, and 22 that are not on the DIP 100325. I have no idea what "VEES" is and have been unable to find a definition. The 24-pin DIP appears to be no longer procurable,
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bhankiii Guru Join Date: Sep 2006 Location: El Lago, Texas, USA Posts: 2639 Good Answers: 65	#1 Re: ECL logic 05/13/2008 3:16 PM
	VEE is typically the negative supply on ECL chips. The VEES(ubstrate) pins are used to dissipate heat from the package. These pins are connected internally through the substrate to VEE. Connect them to VSS.
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R. Becker Participant Join Date: May 2008 Posts: 4	#2 In reply to #1 Re: ECL logic 05/13/2008 3:20 PM
	Thank you. That's all I needed to know.
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