Current Converter with Lag Compensator

The first thing I would do is matlab the problem to see if the poles and zeros that I picked for the plant control produce a reasonable response to the system. You want to have enough phase margin so when you put your digital controller in the loop the delay doesn't hurt you.

You talk about a delay in your control loop. Is your dsp or processor making more delay when you add the PI controller in the loop opposed to just the P controller? If it does then this could destroy your phase margin and you will not be able to control the motor. I would think your sampling rate should remain constant for your controller but maybe it does take longer to do the PI controller than just the P controller. Are you doing a controller that looks something like Y(n)=a1*X(n)+a2*X(n-1) + a3*X(n-2)+... for your proportional controller? I would think your PI controller would look something like Y(n)=a1*X(n)+a2*X(n-1) + a3*X(n-2)+...-b1*Y(n-1)-b2*Y(n-2)-..... Just pick your coefficients so your controller does the right thing and is stable.

Thank for your reply.

I also used Matlab for testing my parametters.

First, my control plant in form: a/(bs+c) so I think the phase margin have no meaning here, is that right ?

The lag controller (or PI) only for improving the steady-state error.

My design using FPGA virtex2, when I change from P to PI: Yes, the calculation time is changed but it is very small, the different is about 5 ns.

Yes, my controller uses this form

Y(n)=a1*X(n)+a2*X(n-1) + a3*X(n-2)+...-b1*Y(n-1)-b2*Y(n-2)-.....

By the way, my design is runs now, the problem is first, I select Ki very small for prevent overshoot, it does not work. If Ki is increase, and produces a little overshoot, then it works.

Is that the solution ? Could you explain me the reason ? I think it should be no overshoot is better. and Ki does not affect to rising time.

Also, what do you mean about "Just pick your coefficients so your controller does the right thing and is stable. " ?

Your system will have some sort of phase related to it. The phase margin is found by looking at your closed loop gain. When the closed loop gain =1 or 0db the phase (lead or lag) of the closed loop should be greater than -180 degrees. The phase margin is found by taking your phase and subtracting -180 degrees. You should try to shoot for something like 60 degrees of phase or more.

The coefficients that I was talking about are the a1,a2,b1,b2 coefficients. By choosing the coefficients your change the poles and zeros of your controller. When you Matlab your system, are you using Matlab or Simulink? You have to remember to C2D your system because you have a digital controller not a continuous one. This will change your coefficients. This could be the problem for you? But maybe not. You can pzmap your controller in Matlab to see if your poles and zeros are were you want them. And you have to make sure all your poles are inside of the unit circle. Don't forget about round off. The round off error in your FPGA can push the poles outside of the unit circle.

If I understand your notation, Ki is the gain for the integral controller. Is that right? If it is then by changing Kp (the proportional gain) should change your rise time and overshoot. You could do a PID and maybe add a little speed too. But I think if it works good enough how you have it now then you should stay with your method. you should go with the simplest method.