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Associate

Join Date: Feb 2008
Location: New York
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Serial Peripheral Interface Riddle

08/16/2010 10:32 AM

Ok so its not really a riddle but I can't get my head around this. I have traced a known-to-work, commercial, mass produced circuit on a fairly simple 2 IC pcb with one 8051 and one fm "wireless link" transmitter connected via an SPI peripheral on the 8051 (LPC936).

The question is why would they connect the MISO line of the 8051 to the CLK of the slave??? The CLK of the 8051 just drives an LED, which makes some sort of sense to indicate SPI output. There is no data returned from the slave, and the only thing coming out of the master is an very occasional 2 byte command. I've triple by triple checked the circuit and datasheets. MOSI --> slave's data and ~SS to CE, otherwise.

I'm no SPI guru, so is this spec'd in the standard... that MISO will drive a slave's data clock? Or should I assume I have to bitbang out the whole thing in firmware?

The bus is just one to one pin connection; there are internal pull-ups in the 8051. There doesn't seem to be a great mismatch between the timing specs of the 8051 and the slave.

I can provide data sheets, but I hoped that this question is easier to answer... I'm pouring over both myself and can't see any glimmer of clarity. The pins on the 8051 have no other special uses. Why switch pins??? I can't find anything to suggest the pins are swapped on the 8051...

Many thanks for your thoughts.

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Guru

Join Date: Jan 2010
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#1

Re: Serial Peripheral Interface Riddle

08/16/2010 1:13 PM

For those of us who have no idea what the thing is your describing, could you explain what the thing is meant to do.?

and a circuit diagram of your circuit, also is your circuit working correctly, and if so is all you need an explanation of how it works or why it works ?

sorry not be of more use but i cant understand the question the way you have formatted it. It may be just me.

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Associate

Join Date: Feb 2008
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#2
In reply to #1

Re: Serial Peripheral Interface Riddle

08/16/2010 6:34 PM

No worries. I figured that anyone who would have an off the cuff answer would have a pretty sharp working understanding of what I'm describing and opted for brevity and detail.

Basically, I have a working circuit that I am repurposing. Consisting of an 8-bit microcontroller, a few buttons, a programming interface, and a BH1418 FM transmitter chip. The uC and transmitter communicate using a common serial standard (SPI, based on some reading today isn't really a standard at all). I have no access, nor is there a physical way to access for this controller, the firmware in the chip.

The problem is that the connection wiring between the two chips is odd. Odd enough to maybe not even be able to use "SPI".

Sorry to be exclusive.

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Location: Birmingham, England
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#4
In reply to #2

Re: Serial Peripheral Interface Riddle

08/17/2010 7:06 AM

Can you cut the track between the MISO pin and the transmitters' CLK input and put a scope on the MISO pin? If you see a clock pulse, it will confirm it's not using SPI but just bitbashing port pins to drive the FM module. The occasional two bytes you're seeing are probably to set the PLL frequency.

Just out of interest, how will you 'repurpose' the circuit if you can't access the uC.

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Guru

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#3

Re: Serial Peripheral Interface Riddle

08/17/2010 6:46 AM

I see what you mean!

What is the slave?

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Associate

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#5

Re: Serial Peripheral Interface Riddle

08/17/2010 11:17 AM

Thanks for everyone's feedback.

So a test set up to see what the uC is doing would take a while, which is why I asked first. I think thats what I will have to end up doing though. I will have to borrow a friends iPod to do some handshaking to get the thing to turn on.

I can very much access and program the uC. I just can't read the flash, otherwise I could just reverse engineer the code to see if/how they are using the SPI special function registers. As a security feature, there is simply not provisions in the hardware to read the flash.

The slave is a Rohm BH1418F FM transmitter.

So.... no clear answer is a good enough result right now. Thanks for the thought.

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Anonymous Poster
#6

Re: Serial Peripheral Interface Riddle

08/20/2010 12:46 AM

I think the code is toggling between setting the SPI port from being a master to being a slave. In this manner you get the ability to drive two output lines for one chip select. They must be relying on the storage state of a previoiusly set MOSI used in master mode to stay put while the port is confiugred to switch to SPI slave, which turns the MISO into an output driving the FM chip.

I would guess that a SPI CLK is much too fast for the FM part so that you need to bit bang at SW speed a clock signal by using the slave mode drive out of the uC.

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