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Join Date: Dec 2010
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Digital Electronics - Delay Subroutine

12/27/2010 8:33 PM

I am fairly new to the field of vhdl programming. I am trying to write a code in vhdl to control a stepper motor(bi-directional). I have written the code which compiled successfully. My problem now is to include a delay subroutine within that code to delay the process clock to a very reasonable motor speed. Process clock is 100Mhz.I don't know if i am to write a different entity for the subroutine or not. Can someone assist me with an example synthesisable code which incoporates the delay. I am using an altera cpld. Thanks to all.

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Anonymous Poster
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Re: Digital Electronics - Delay Subroutine

12/30/2010 1:57 PM

there is no need for writing a separate entity. just write a process for 27 bit counter (counting the processor's active edge) in the start, and use its MSB as your clock.

this will approximately give you a clock of frequency less than 1 Hz....you may change the number of bits as per your clock frequency requirement.

[20 bits ~= 1 Mega...]

:)

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