Which of the Design Methods for Practical CMOS Design is?

I think you need to define what you mean by efficient first...
Efficient in what respect? Time, size, power etc
Not that I'll know the answer...
Del

This is a question that only Carnac the Magnificent can answer.

The most efficient way to get a design implemented is to not use an acronym until it is designated.

The most efficient design has no idle circuitry drawing power. A million gate Application Specific Integrated Circuit (ASIC) will be more efficient than a million discrete Complimentary Metal Oxide Semiconductor (CMOS) discrete gates. Using this same ASIC for just one logic NOR condition is grossly inefficient to using one CMOS NOR gate.

What is that you want to DO? Answer is required in 3 paragraphs.