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Frame Synchronisation via Modified Approach of Bit Insertion

03/06/2015 9:54 PM

1. The Problem:

I am currently embarking on a project which requires me to design a system where I can transmit voice over a distance, by inputting an analog voice signal on one end and then recovering the voice which I input on the transmitting end at the receiving end.

The general design (given by my teacher) is here (and I am allowed to modify the design if I wish to):

However, I am stuck on the problem of achieving frame synchronisation, which is essential in recovering the voice signal at the decoder (receiver).

2. The Given Components (I have only stated the chips here):

TTL I.C.s components:
74 HC 00 NAND gates
74 HC 04 NOT gate
74 HC 32 OR gates
74HC73 Dual J-K Flip-Flops with CLR
74HC74 D-flip-flop
74 HC 164 Parallel-out serial-in shift register
74 HC 165 Parallel-out serial-in shift register
74 HC 191 4-bit counter
74HC297 DPLL

Analog components:

TP3054/TP3057 PCM codec
LM386 Audio amplifier

3. My thoughts and attempt at arriving at the solution:

Currently, I have thought of using bit stuffing to achieve frame synchronisation while keeping the probability of the frame marker detector detecting false frames to a minimum via the attempt to eliminate false frame markers. However, in the project, we have to ensure bit synchronisation and hence, the presence of the bit clock hampers our solution, which is to do bit stuffing, since the insertion of a binary digit will extend the bit clock duration and cause bit synchronisation problems between the receiver and transmitter.

Hence, I have modified our solution to the case where, instead of inserting a binary digit, I will change the LSB (least significant bit) of the n-bit codewords, e.g. 01111110 to 01111111, for instance.

However, I have 3 questions in mind:

Q1. Is this implementation of my solution possible with the chips I have above?

Q2. How can I tell my chip to change the least significant bit of my n-bit codewords?

Q3. How do I identify the LSB of my n-bit codewords?

Just wondering, if my modified solution of bit stuffing does not work, are there any solutions or resources which I can point to to get ideas for eliminating to a minimum, false frame marker detection by the frame marker detector?

A big thank you to anyone who can help me in my questions above. :D

Thanks again!

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#1

Re: Frame Synchronisation via Modified Approach of Bit Insertion

03/06/2015 11:01 PM

Do you want to broadcast in analog or digital?

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#3
In reply to #1

Re: Frame Synchronisation via Modified Approach of Bit Insertion

03/06/2015 11:41 PM

I will be broadcasting it in analog, as there is a speaker at the receiving end of the system :)

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#2

Re: Frame Synchronisation via Modified Approach of Bit Insertion

03/06/2015 11:14 PM

Have you read Patrick Robertson's 1995 paper titled, "Optimal Frame Synchronization for Continuous and Packet Data Transmission" ?

I seriously doubt that you will be able to synchronize with one bit.

Chapters 6 and 7 are likely to help point you towards your solution. Given the rudimentary devices available to you, pick the simplest solution you can.

Appendix E has sync words having low autocorrelation functions, meaning they are not as likely to confused with the data.

This is a HARD project. Are you sure you are not being used as a free design source for the prof's side business?

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#4
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Re: Frame Synchronisation via Modified Approach of Bit Insertion

03/07/2015 12:03 AM

Oh nope. I shall go and read that later. :) Thank you for your suggestion!

Just to be sure, in order to achieve frame synchronisation, we have to reduce the possibility of having false frame markers detected by the frame marker detector right?

This is what I have learnt for preventing false frame marker detection.:

For example: We set our frame marker to be 1010, a 4-bit number.

Transmit: 101001101010.

My prof said this is a bad way to choose the frame marker, as assuming that we transmit a frame marker followed by a series of data, there may be a chance that there is a false frame marker in the middle of the data stream (after the first '1010' frame marker), which will affect the system. [Pardon me if I am wrong as I am recalling this from memory.]

My prof hence asked us to choose a frame marker wisely.

Haha! No, of course not. :P I am being graded for this project. :(

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#5

Re: Frame Synchronisation via Modified Approach of Bit Insertion

03/07/2015 3:10 AM

I think it has been done before, but here's my improved design.

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#7
In reply to #5

Re: Frame Synchronisation via Modified Approach of Bit Insertion

03/07/2015 9:08 AM

Um. I am confused. What is this? Haha. My circuit is supposed to be on a breadboard... :/

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#9
In reply to #7

Re: Frame Synchronisation via Modified Approach of Bit Insertion

03/07/2015 10:03 PM

My favorite bread board:

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#10
In reply to #9

Re: Frame Synchronisation via Modified Approach of Bit Insertion

03/07/2015 10:31 PM

That's a chopping board.

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#6

Re: Frame Synchronisation via Modified Approach of Bit Insertion

03/07/2015 9:07 AM

I realised that image could not be displayed. Let me re-upload it. Sorry.

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#8

Re: Frame Synchronisation via Modified Approach of Bit Insertion

03/07/2015 9:52 AM

Have you considered zero-bit insertion?

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#11
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Re: Frame Synchronisation via Modified Approach of Bit Insertion

03/07/2015 10:34 PM

Ah I see. Hmm. But if I were to insert a zero bit, it will cause the trailing 1s and 0s to be shifting down by a unit of time right? Won't this also cause my bit clocks to become unsynchronised? :X

I will read the article you have posted later. :) Thank you!

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