Noiseless Electric Circuits

It sounds like the theory behind balanced output and input and transmission via shielded twisted pair, which is pretty close to noiseless.

You are correct, GA. In the real world, there will always be some coupling between an analog signal and the environment. With proper engineering, you can make it very low but not zero.

You can transmit a signal digitally without noise from the environment but then you are putting the noise in yourself in the form of quantizing error.

There's no free lunch.

Maybe they could find a place where the temperature is below absolute zero like the crew of TNG did here?

Anyway - very informative and GA!

I wouldn't say noiseless, I would say reduced noise.

electronicdesign.com/power-supply/3-ways-reduce-power-supply-noise

controldesign.com/articles/2008/reducenoise0812/

techdesignforums.com/practice/technique/reducing-system-noise-with-hardware-techniques/

Lady Blakeney Portrait Clocking

Well, this community seems to have put noiseless to bed.
So, lossless seems moot. On the Heavyside, even strictly
distortionless will pale compared to its original.
However, I still like adaptively approaching R/C=G/L
as broadly over a frequency range as one can. It allows
standing waves on a loop to stand their ground to the extent
that you can achieve it. An alternating Shah function
with a peak and an antipeak standing on 0 degrees and
180 degrees of a transmission line loop would be an
interesting variation on Tesla style coils. For a slow
VOP it would need a high C*L product and either a constant
or a smooth gradient C/L ratio to minimize reflections.

Has anyone built one ? Did it couple energy in at 90
and 270 ? Such a device would, rather than be noiseless,
probably clack like colliding bolas. And be weilded by
Zeus. I am aware of Multigig clock rings but they did
not attempt geographically stabilized Shah functions,
nor adaptive distortionless operation, nor even round
their corners to reduce reflections. They just pumped
in lots of power to overcome these architectural
faux pas. Thus, after making a great start(distributed
adiabatic driving of a transmission line ring) missed
the mark on a minimalist clock distribution power
requirement. They should have watched "The Scarlet
Pimpernel" and made their system more like a swallow's
flight to provide the king's cuffs.

Odds fish, otherwise their melancholy portrait of

Lady Blakeney(low power clock distribution) was

the spitting image of her.
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thewildotter

Transmission lines most certainly have been made and are in use right now in bringing electric power to your fingertips. (That's a metaphor. Don't put electricity directly on anyones fingertips.) This is still the most efficient method of transferring power from one location to another but it is not lossless. Ideal values of R and G represent the mechanism where electric power gets transformed into another form of power.

(Your colorful metaphors usually amuse and frequently baffle me. Once the layers of metaphors get three layers deep, I believe any author no longer cares about the accurate transfer of thought. Lady Blakeney, WTF?)

Has anyone built one ?

Has anyone built what? A Tesla Coil? Distortion-less circuit? A low power clock? A portrait of Lady Blakeney? A king's cuff? Try to make sense please.

Don't question him, he'll post again....

The Cufflink Picture Was Great

SE, you were doing so well before with the swallow cuff links(a swallow's flight appears to be effortless<low power>). Then you had to go and be right about me posting again like it was to be avoided at any cost. Oh well, I guess I will just hum a few bars of "There'll be a five dollar fine, for whining" and let it pass. Maybe you do not know that a very large percentage of processor chip power these days is squandered in clock distribution. Maybe you do not care that processors are now seriously lagging Moore's Law. Maybe you do not believe that adiabatic circuits(transmission lines with their active devices not in series with the segments of the line) are the best short term way to get back on track wrt Moore's Law. Maybe you never read Oliver Heavyside or studied Pupin. Maybe you were never a fan of saving aristocrats from the French Revolution.

The point of this thread is noiseless electric circuits. The point of lowering the noise of circuits is to get a better S/N ratio without raising S. The point of not raising S is to reduce power requirements. The point of reducing power requirements .... These are real and important topics. They are worth exploring... in depth. My Pimpernel references are obscure but relevant. The Baronet(Sir Percy) says that the portrait is the image of Lady Blakeney but that the artist has missed her mouth completely. Multigig has the image of what can be done to save clock distribution power(adiabatic circuits driving ring transmission lines) but has missed her mouth(their clock distribution still eats too much power, clocking conveys no changing information and should require negligible power) completely. I know that explaining this destroys the spontaneity of the humor but there is a REAL message in the humor that NEEDs conveying. I am not proud, nor tired and listeners can expect it to come around again on my guitar just like the "Alice's Restaurant" refrain. I hope you all enjoyed the 24 glossy photographs with circles and arrows and a paragraph on the back of each one... I also hope the judge does not arrive with a seeing-eye dog.

So, what is my point ? Transmission lines run with distortion-less parameters can make the amended Multigig image of what to do to save power viable. I think Multigig was bought out by AMD and I do not know if that was to use and improve their technology or to bury it. I really do not care. The Heavyside criterion improvement is still in the Half-Bakery. I would be thrilled to see AMD or anyone else pursue it. I was hoping CR4 could resolve good directions to pursue a step-by-step plan toward maturing the idea. The noiseless circuit thought is related and may well be very similar in requirements. As soon as clock distribution power has been adequately addressed, all of the nets actually carrying unpredictable information can benefit from adiabatic techniques. After all, right now we are severely limited by the 1/2cvv switching power where v is a fixed hi logic level minus a fixed low logic level which makes us sensitive to process limitations on device thresholds. An adiabatic logic family which can operate with microvolt delta levels is possible and has great potential since the power is the square of the delta voltage. That weans us off of thresholds and puts us back in the S/N realm potentially saving a lot of power.

____________

thewildotter

To be more clear, 1/2CV_hiV_hi - 1/2CV_loV_lo is the energy for a transition. When the high voltage is within millivolts of the low voltage the energy can be way lower than fixed voltage levels related to threshold voltages of devices which force delta voltage in the tenths of volts as opposed to delta voltage in the thousandths of volts. The way I said it before sounded like 1/2C(V_hi-V_lo)² which was not what I was trying to say was the transition energy. The power is the frequency times the correct energy number. My point about the power requirement for a chip remains despite my casual language. My apologies.

________________

thewildotter

Thank you so much for that clarification, for the less fortunate of course....

Oh I don't mind that some of the French Aristocrats were saved from such a ghastly fate, performed in such a cruel manner...We and the French are inextricably bound in the birth of our democratic nations...so much shared history and fundamental beliefs....and yes bloodshed and cruelty...

..."The French Revolution fished widespread American support in its early phase, but when the king was executed it polarized American opinion and played a major role in shaping American politics.^[43] President George Washington declared neutrality in the European wars, but the polarization shaped the First Party System. In 1793, the first "Democratic societies" were formed. They supported the French Revolution in the wake of the execution of the king. The word "democrat" was proposed by French Ambassador Citizen Genet for the societies, which he was secretly subsidizing. The emerging Federalists led by Alexander Hamilton began to ridicule the supporters of Thomas Jefferson as "democrats". Genet now began mobilizing American voters using French money, for which he was expelled by President Washington.^[44]

After President Washington denounced the societies as unrepublican, they faded away. In 1793, as war broke out in Europe, the Jeffersonian Republican Party favored France and pointed to the 1778 treaty that was still in effect. Washington and his unanimous cabinet (including Jefferson) decided the treaty did not bind the U.S. to enter the war, since they stopped being in favor of the Revolution after they executed the King; instead Washington proclaimed neutrality.^[45] Under President Adams, a Federalist, an undeclared naval war took place with France in 1798–99, called the "Quasi War". Jefferson became president in 1801, but was hostile to Napoleon as a dictator and emperor. Nevertheless, he did seize the opportunity to purchase Louisiana in 1803.^[46]

The broad similarities but different experiences between the French and American revolutions lead to a certain kinship between France and the United States, with both countries seeing themselves as pioneers of liberty and promoting republican ideals.^[47] This bond manifested itself in such exchanges as the gift of the Statue of Liberty by France.^[48] "...

https://en.wikipedia.org/wiki/Influence_of_the_French_Revolution

I see what you mean.

One Net for Clock Distribution vs Many Buffered Nets > +1 for Multigig but...

Has anyone built: an adaptive distortion-less transmission line ring. For example: one might control G(leakage) by placing opposing diodes(perhaps back to back 1N914's) at frequent intervals across the conductors of a transmission line. Each package of opposing diodes has one thermally commoned resistor and the resistors, all in series, are heated with a slowly controlled current in a loop. Somehow(possibly by observing a widening of Shah waveform spikes or a geographical drift in their location) you sense the error deviating your transmission line from distortionless operation and adjust the current through the resistors to correct for the error.

Multigig merely brute forced their circulating pulses into sharpness and symmetry with inverter drivers. I was looking for an indication that someone else had actually achieved an adaptive control to insure that the Heavyside distortion-less criterion was maintained. My straw-man G approach above is merely an example. One might also maintain the criterion with C, R, or L or some combination of any of the four.

Why would anyone want to add leakage to a transmission line ? It may seem counter-intuitive, but despite the gut reaction that leakage wastes power, on a lossy transmission line used for clock distribution, adding a little leakage might easily save huge amounts of power normally wasted in non-adiabatic systems due to 1/2cvv losses incurred by each transition of each buffer down the clock distribution h-tree. Multigig rings do avoid series buffering but they do not attempt to run distortion-less and therefore use large amounts of power actively forcing the waveform edges square again as opposed to just adiabatically bringing the logic levels back into spec to correct for some small amount of attenuation from R and G losses. In short, Multigig perceived the value of distributed adiabatic circuits for saving power but did not perceive the advantage of distributed distortion-less operation of their transmission line parameters.

There is another historical example of success due to distortion-less operation of transmission lines albeit not transmission line rings. That is the story of Pupin and adding multiple lumped L loading coils in order to make long telephone lines approach distortion-less operation. I was somewhat surprised that no one mentioned Pupin in reply to my question but maybe I expect too much. I was less surprised that CR4 knew nothing about "The Scarlet Pimpernel" and the humor Sir Percy Blakeney used to critique the portrait painter since that is a rather obscure reference which may be specific to one of at least three movies of that title. I once had a female EE co-worker who got all of my Scarlet Pimpernel references and I find it hard now to omit them. I guess she does not haunt CR4. How unfortunate for us !

______________

thewildotter

Oh I don't find them obscure at all...perhaps dated, but aren't we all...

https://www.facebook.com/tcmtv/videos/the-scarlet-pimpernel-34/10156456550820396/

..."Engineers continue to find new ways to design CPUs that settle a little more quickly or use slightly less energy per transition, pushing back those limits, producing new CPUs that can run at slightly higher clock rates. The ultimate limits to energy per transition are explored in reversible computing.

The first fully reversible CPU, the Pendulum, was implemented using standard CMOS transistors in the late 1990s at MIT.^[5][6][7][8]

Engineers also continue to find new ways to design CPUs so that they complete more instructions per clock cycle, thus achieving a lower CPI (cycles or clock cycles per instruction) count, although they may run at the same or a lower clock rate as older CPUs. This is achieved through architectural techniques such as instruction pipelining and out-of-order execution which attempts to exploit instruction level parallelism in the code.

IBM is working on 100Ghz CPU. In 2010, IBM demonstrated a graphene based transistor that can execute 100 billion cycles per second^[9]."...

https://en.wikipedia.org/wiki/Clock_rate

https://en.wikipedia.org/wiki/Heaviside_condition

https://en.wikipedia.org/wiki/Mihajlo_Pupin

https://lanworks.com/multigig-what-is-it-and-why-do-you-need-it/

https://lanworks.com/wi-fi-6-the-latest-and-greatest/

Distortion is only one of the many forms of noise.

I was talking about this Multigig:

Rotary traveling-wave oscillators (RTWOs) repre- sent a new transmission-line approach to gigahertz-rate clock generation.

As written up in EE Times.

I do not know if they have anything to do with the networking stuff of similar name.

______________

thewildotter

That article in EE times is 13 years old and the other one is nearly 20 years ago...Multigig was bought by Analog Devices in 2012...

And your point is ? Transmission line loops are still not being used as they deserve to be. I don't care if Archimedes invented them. They are an even better idea now than they were back then because the frequency of the chips has gone up. If we had used transmission line loops more competently back then, we would have faster processors today and the frequency we are running at would be higher still.

If you are saying that the age of my Multigig reference is why you came up with the new use instead of the old one, that makes sense. My disambiguation is just that, not a criticism.

____________

thewildotter

I do appreciate your correction regarding Analog Devices(not AMD) buying out the Rotary Clock Multigig company. It even makes a lot of sense since Analog Devices probably has lots of mixed analog and digital chips which likely need really fast, low power clocks.

____________

thewildotter

There is a Lot of Power On the Wires

"transistor that can execute 100 billion cycles per second^[9]."...

Ah. There is a common misconception that transistor speed is controlling now for chip performance/power. As long as we use fixed voltage levels to represent logic states and switch those levels with serial buffers/logic and nets we cannot build faster chips because we are up against the (1/2)CV² per transition energy requirement to put those levels on the wires. Faster switches do not solve the problem, it just makes the wire power problem more apparent.

My thesis is that we MUST(have to, gotta) change our representation of logic states to use MUCH lower voltage differences to represent logic states or our chips will be power limited by a performance ceiling. Our devices(transistors) already switch efficiently enough to NOT be the power problem. The transmission lines can ONLY be efficient enough if we drive them from the side(T connections) instead of serially(device-net-device-net-device-net...) The rotary clocking scheme drives its transmission line from the side but it still needs too much power because of dispersion and the resulting distortion. That distortion requires the drivers to waste too much energy per transition correcting the waveform. An adaptive distortion-less transmission line does not distort(very much) and therefore the distributed driver devices do not waste all that power correcting the waveform. As frequencies increase the effect will track and distortion-less operation will become essential to increasing the chip performance at tolerable power levels.

Since fixed voltage levels have represented logic states nearly universally for a very long time there is considerable inertia to sticking with that scheme but we cannot continue the practice and be anywhere close to Moore's Law. Since fixed voltage level logic state representation is so fundamental to our current technology, the transition will be traumatic. People have tried to do adiabatic computing(as you note) for a very long time and have had little success. I believe that is because there is a psychological aversion to adding leakage. Reducing R is technically mature and basically out of gas until graphene or superconductors can be used economically. G is currently EXTREMELY small so R/L=G/C is difficult to satisfy. Reducing C has been the target of intense efforts for decades just like reducing R because delay for CMOS devices is predominantly R*C. Increasing L with Pupin-inspired moves on chip is prohibitive in terms of real estate and since R generally tracks increasing L, pointless. We are back to G and we will just have to convince our EE associates to give up their desire to make G vanishingly small. That is basically what I am attempting here. Note also that increasing L increases transmission line delay since it is basically sqrt(L*C). So, as you recall, I was promoting a back-to-back heated diode means of adding G. Please comment on that scheme or propose others for providing adaptive distributed leakage on a discrete component scale. On chip one might provide many small gates operated slightly below threshold to achieve the desired controllable(adaptive) leakage without a resistor heater.

It strikes me that many will not understand just how profound the change is that I am proposing. Basically, a chip designed this way will have just a few(maybe the "word size" in bits) very long transmission line loops gently curving around its real estate. Devices along(but not subdividing) each line will drive existing pulses higher or lower by micro(or less) volts to represent logic states and driven circuits(alongside, there are no terminators) will need to be designed to respond to pulses depending on whether they are higher or lower in voltage than expected(perhaps than their recent temporal neighbors.) All the circuit library input gates must be capable of interpreting these pulses with tiny delta voltages as their appropriate logic states. There are no circuit books with absolute voltage level interpreting inputs, only tiny delta voltages are logic states. There are always pulses on all the nets. Clocking and clock distribution is inherent with the pulses and it may be the case that clock skew is replaced with bit skew across the loops. The transmission lines themselves become an inherent memory, well integrated geographically into the random logic. There are only clock nets and the energy forming the pulses on the clock nets remains on those net loops from power up to power down consuming only the power lost to attenuation while the processor is running. Some circuit library architectures may also eliminate power supply wires to circuits since clock pulses can supply power. Clock loop power distribution may or may not be the best thing to do and is a very long discussion. Logic state representation may also be implemented in pulse edge timing rather than delta voltage levels, but that also is a long discussion. For now, we need to recognize where the power is going in our existing architectures and seek a good alternative.

____________

thewildotter

No I'm not arguing the logic, it seems like something that should have been done already, this tells me there is a problem with implementation...How do we get to there from here, and who pays...Like so many other things that make perfect logical sense, there is usually several insurmountable problems that send us in another direction....Usually economic feasibility....

"Who Pays?" Torpedoed Me

I was arguing this to the research division of a large computer company before I had even heard of Multigig. Research was about to fund me to do a test chip before they found out I was in development rather than research. Your "who pays..." in my case was exactly what happened and the funding which had already appeared on some planning pitches was suddenly deleted. I got a call from the head of research killing my project. I encouraged him to get one of his minions to pursue it and I would consult off the clock. He did not.

I had called it standing wave clocking on distortion-less transmission lines. When I later saw the Multigig white papers, I was pleased that they were doing transmission line rings but appalled that they did not make them distortion-less and that they had 90 degree turns in their loops and their first example chips had a very large number of separate clock loops which required synchronizing. They had, however, found a means of making a traveling wave of square pulses propagating in only one direction which was superior to my two adjacent loops both of which had a standing wave which would have likely been problematic near nodes. They had to phase shift at varying tap points but I needed to stabilize phase to position. Theirs used one conductor looped twice before rejoining. Changing levels of metal on theirs to rejoin causes impedance discontinuities and reflections which eat power. Standing waves on mine were likely to cause current spikes.

I still believe that the concept can improve performance for a particular power goal over the entire collection of all of the things that have happened since that I have been able to view in this clock distribution arena. And it has the potential to greatly affect the entire strategy for logic signal flow as I have outlined in another post.

_____________

thewildotter