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Anonymous Poster

about project

02/04/2009 5:13 AM

I am doing project in CMOS VLSI .I have a query . I want that in CMOS design what is effect of change in W/L ratio on threshold voltage.
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cnpower
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Engineering Fields - Control Engineering - New Member China - Member - New Member

Join Date: Sep 2006
Location: CHINA
Posts: 2945
Good Answers: 14
#1

Re: about project

02/04/2009 7:42 AM

I cannt help you , but I suggest you go to some semiconduct industry web site for help.

I seem to remember that the wide/length is change, the ditch depth will be change as well. and control (grid) pole voltage will change. (G,D; D,S voltage)
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