im working on a project of data acquisition:
the task is as follows:
there is a 50Hz clk with 10.5%duty cycle. after the on time of this pulse the data packet comprising of 50 bytes including start, stop, chksum, and 2 iniaillizing bytes is to be transferred. each bit of these 50 bytes is sent on a 128khz pulse. the valid data from byte 3 to 47 is to be transmitted to the spi port. each 50hz signal will transmit only single packet comprising of 50 bytes as mentioned above.
i developed the required code using c language. i utilized timer0 and timer1 to generate 50hz signal. i used two timers because after the on time the data is to be transferred in the off time. the 128khz signal is interpreted as an interrupt. timer0 and timer1 are also operating on interrupt basis. at timer0 overfolw, the 128khz signal interrupt and timer1 interrupt is activated and timer0 interrupt is deactivated.
in timer1 interrupt, the timer0 interrupt is activated while timer1 interrupt is deactivated.
during 128khz interrupt, the 50 bytes are received on a port pin(bit by bit on each rising edge of 128khz signal) and sent to the spi port.
ive utilized avr studio4 with winavr to develop the code.
the issue is that the code is running well in the simulator, but not in proteus and in real hardware.
can anyone indicate the possible problems and any error in building code logic.
share your suggestions and better solutions as well.
thanks