Multiplexing problem

Hey

Can have a circuit diagram

thn ur pblm will be more clear

so if u can have it then i hope it will b more clear

regards

You need to make sure that you enable only one channel on one chip at a time - in other words, make sure you only drive one of the eight inhibit lines low at a time. If that's not the problem, I would suggest adding a ninth chip, and use it to mux the outputs from the first 8.

Two great choices:

1. Isolate each input. Use one dedicated signal isolator for each input.

2. Allow each input to occupy two dedicated input slots in order to properly isolate each signal from each of the other signals.

With lack of understanding and no circuit diagram please don't be bashful in order to arrange for further details.

Assuming that a MC14067 analogue multiplexer is suitable for you application, bhankiii has given a pretty comprehensive answer. If that doesn't work, either:
One/some of the muxes are dead; or
Your signal is too fast for the RC time constant of the analogue muxes (when combined with the load you are requiring the muxes to drive).

If the latter, you should look at a digital mux from the same series as the logic family that is providing the signal - and check load compatibility.
bhanksiii's stricture on tristating outputs is even more important for digital outputs, as the drive currents can be quite high. In any event, if you find that you are anywhere near the limits on speed, I would suggest that two-stage multiplexing is the better digital approach.

Fyz

Most digital problem are stemmed from two simple and over-looked condition.

Actual ground loop with the shielding of your sense cable tied at both ends, which would carry an Rf interference with the signal.

And secondly, the actual Rf interference of your device supply voltage running parellel with your sense lines. EMF is prevalent in parellel, high voltage power feeds.

And some of the most simple and overlooked problems, are the actual size of grounding conductor and the common looping. Each sense input should actually not be looped to your I/O boards. Grounding should be the only "bundled" common. Your (+) and (-) inputs are each individual from other inputs to the multiplex board. Thus, your input sensing signal has no other cross interference from other signals. And if it is a very long run, you must calculate the routing of your sense lines to avoid external disruption of the input-signal. If the sense lines are being run overhead in wire-ways that traverse over and near 277Va/c lighting sources, you definatly have induced high-frequency EMF interference.

Good luck in the fix.

Good luck in

First, thank you for you help!!

Here is shown the just two multiplexers connected and some devices tied to the Multiplexers from where I whish to get data back.

The microcontroler is the one selecting, together with BCD decoder, the multiplexer to be used.

regards!

Delmar

I can't see anything wrong with this: the BCD decoder obviously achieves Bhankiii's sugestion.

• How fast are you trying to run things?
• What are the sources of the signals?
• Are you sure the I/O pin on the controller is programmed as an input?
• Can you measure voltages either side of both enabled and disabled multiplexers in a static state (controller holding all control signals constant)?
• I don't think there's a problem with using analogue multiplexers here, but, I think digital ones would have been a more obvious choice.

• How fast are you trying to run things?

10KHz maximum

• What are the sources of the signals?

The microcontroller ask to the 1 wire memory. 1 wire memory answere.

• Are you sure the I/O pin on the controller is programmed as an input?

With out Multiplexer I can receive the answere from the 1 wire memory. So I am sure in a periode of time is an input.

• Can you measure voltages either side of both enabled and disabled multiplexers in a static state (controller holding all control signals constant)?

Multiplexer is working as a switch. I try it.

• I don't think there's a problem with using analogue multiplexers here, but, I think digital ones would have been a more obvious choice.

Hmm!, let me think, make some tryals. In case this do not work then I will try just digital ones.

If the decoder is conventional BCD input, such as a 7442, 74C42 or equivalent, then the fourth decode pin would need to be grounded. Otherwise, the TTL versions would pull pin 8 low for code N000, (N meaning not-connected), but none of the other MUX chips would ever be selected, because all the outputs would remain high for all other codes. The output of CMOS versions would be indeterminate, because an open-circuit CMOS pin really can float between the rails.

Sorry this is a modified repeat of part of my previous posting - but the schematic does look extremely suspicious in this regard

If the above is not the problem, it is unlikely to be the MUX speed itself - unless there are unshown loadings on the MUX outputs. But it may be that the controller timing is wrong, and that it is trying to read the MUX output before it has had time to settle. As you have such a wide slot, I would be inclined to leave the signal at least 50-us to settle before sampling - and also to complete the data transfer into the controller before you make the next transition on the MUX control signals (but the second may be unnecessary belt and braces, because I don't know the controller).

Fyz

I guess that analogue muxes were chosen because of the need for bidirectionality for the one wire memories. Now, the open collector (I guess: like Fyz I can't read any of the device parts) output of the memory can drive the 2K2 pullups low easily enough, but, when the controller is trying to drive a low it has the potential divider formed by the R_ON of the switch and the pullup to overcome. The only "one wire memory" I have looked at has an unusually low V_IL MAX of 0.4V.

In short with this arrangement the memory can probably talk to the controller but the controller can't talk to the memory.

Maximum R_ON at 25^o C and V_DD = 5V is 1050 Ohms so the minimum pullups you'll get away with will be about 15K (depending on the V_OH of the controller). The trouble is if your memories are a long way from your muxes your noise immunity will suffer.

Hi Randall, Alhuey23

As I said, I can't really read the schematic - so my comments may look (even be) silly.

Randall: do you have some knowledge that these are one-wire memories? - I had taken them to be digital transducer outputs or incoming (asynchronous) bus lines. (Please let me know either way - thanks)

The remainder is primarily for Alhuey23, but I'd appreciate it checking for sanity and clarity:
On the above basis, unless/until you confirm that input D to the BCD decoder is suitably connected, my first line of attack would be that this pin has probably been left floating, which would result in one of the following:
a) Correct decoder, TTL input: the only decoder control pins that are ever selected (low) are ## 8 & 9, which don't control any MUXes. So all MUXes are continuously off
b) Wrong decoder, any connection to input D: most or all of the MUXes are on at any time, and fighting
c) Correct decoder, CMOS input: correct MUX may (or may not) be selected at any time.

It should be a 10-minute job to check the connections are correctly defined, and another 20-minute job with a scope once this is known to see if the various controller outputs behave as expected.

If it still doesn't work when all the control signals and grounds are checked correct, that is the time to monitor the MUX output for frequency response and noise*. If that looks good, you need to look at the code to check that the input sampling times to the controller are suitable ...

*the ground reference for the noise should be near the controller's ground pin.

Fyz

Hi Fyz,

Check out Delmar's reply (#9) to my questions.

"

• What are the sources of the signals?

The microcontroller ask to the 1 wire memory. 1 wire memory answere. "

I think he has re-drawn parts of the circuit to post in his earlier reply, and, probably hasn't been too careful about connecting "unused" pins.

Otherwise most of what you've said looks correct: he needs to check that all the control circuitry is doing what he thinks it is, from both the point of view of the design and the "build" (it may have been hand wired).

Hi Randall, Delmar

Many thanks, Randall - sorry I missed reading this. Everything you say looks pertinent now.

Delmar - the one-wire memory Randall looked at was more tolerant than the one I found - which demands < 0.3-Volt to communicate with the one-wire memory. This could theoretically be possible with "typical" and room-temperature performance multiplexer (250-Ohms switch resistance at VDD=5-Volts), but only if you use a separate lower VDD for the memories that is set at 3-Volts. In practice, it is at best likely to be highly unreliable.

So, even assuming the interconnect is digitally "correct", it is unlikely that you will be able even to read it - as you won't be able to address it, so it won't provide a return signal*.
*Unless the memory uses one of the alternative single wire systems - but I'm not aware of any memories being available that do this.

[I take it that the requirement is for the memory to be programmed and sent out for use elsewhere, and/or as a reader for memory programmed elsewhere. (Clearly, if it is purely for local use, a multi-wire system with larger memory-blocks would be more suitable)].

So you need to use either a low-resistance analogue multiplexer (e.g. ADG706 - but note the switch capacitance and that it uses an 'enable' rather than an 'inhibit' pin), or digital multiplexer/demultiplexer with tri-state (you may find availability problematical, in which case you could use bidirectional transceivers instead)

Fyz

I can't read the device types on the ICs (nor much of the other data - so what follows is guesswork). If the BCD decoder gives seven of the used outputs high and one low, that should be fine - but this needs checking based on the data sheet for the device. The same applies to the effect of the floating input pin - if the circuit is TTL, the floating pin will be high; assuming a 16-pin decoder, I would normally expcet the selection to cycle outputs round pins 9-16, rather than 0-7. (But, if the circuit is CMOS, the input would need to be tied to the appropriate potential)

Fyz

Hi to all:

I have figured out what the problem was.

It wasn't the multiplexers. It was a delay time I made as comentar used for comunication in one of my testing. I forgot to errase the commentar :-).

All you have said is valid and for sure i have learn a lot for what you have said.

Thank's to all of you.

Delmar