Electronic Test Equipment Blog

The Electronic Test Equipment Blog is the place for conversation and discussion about test instruments, board & assembly test, inspection & test, test equipment, and anything else related to the electronic testing field. Here, you'll find everything from application ideas, to news and industry trends, to hot topics and cutting edge innovations.

Logarithmic Amplifier Chip Design and Application Considerations

Posted May 03, 2017 12:00 AM by Engineering360 eNewsletter

Able to compress a signal of wide dynamic range to its decibel equivalent, logarithmic amplifier chips produce an output voltage that is directly proportional to the logarithm of an input voltage or current. These chips are often useful in applications involving signal compression.


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3 comments; last comment on 07/18/2017
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PXI Systems Rival "Big Iron" ATE

Posted October 31, 2015 12:00 AM by Engineering360 eNewsletter

Once relegated to "small" testing situations, PXI and PXIe-based modular systems have come of age. From testing multiple-in, multiple-out (MIMO) communications antennas to sophisticated semiconductors, the standard has spawned numerous solutions that require large numbers of I/O ports. This survey examines some of the high-end test situations that PXI can address. One company, for example, offers timing per pin, data formatting, and PMU per pin on up to 512 I/O channels, a test scope previously confined to mainframe-type testers. Another company recently introduced modules aimed specifically at the automobile industry. The survey includes numerous hyperlinks to company sites for additional information.


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Trojans Find Their Way into the Hardware

Posted March 09, 2015 12:00 AM by Chelsey H

When people speak of Trojans and other malicious logic, they are usually talking about software. They rarely admit existence of malicious circuitry on a chip. The possible presence of such circuitry represents one powerful incentive to continue the fight to keep counterfeit components out of the mainstream. But counterfeits are not the only culprits. The complexity of today's chips means that designing them and verifying their quality requires the services of many people, some of whose agendas are - at best - suspect. This article from IEEE Spectrum examines both the problem and the difficulty of getting anyone to acknowledge that such "defects" even exist, let alone to avoid them or eliminate them.


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9 comments; last comment on 03/12/2015
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Everyone Knows What a Test Instrument Looks Like

Posted February 01, 2015 12:00 AM by Engineering360 eNewsletter

For years, advances in instrument technology remained largely invisible to the user - or at least benign. Instruments got faster and more powerful, but "irrelevant" personality characteristics persisted. Virtual knobs and dials replaced their physical counterparts without changing their feel and function. This article analyzes some more substantive developments, including features that blur the line between one instrument and another. Oscilloscopes, for example, now offer capabilities that once required a spectrum analyzer. Displays can present results in multiple windows, a departure from the single-window norm. Even form-factors have changed beyond luggable instruments and instrument modules. One "oscilloscope-in-a-pen" even fits into your pocket.


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1 comments; last comment on 02/03/2015
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The Best Way to Test and Not to Test DDR Memories

Posted December 05, 2014 12:00 AM by Engineering360 eNewsletter

The proliferation of dual data-rate SDRAMs in computers and computing systems of all descriptions over the past two decades has significantly complicated the task of testing the devices when compared to their single data-rate predecessors. Testing requires strictly controlling clock and data timing and taking other precautions. This series of four articles examines how to conduct such tests to get the best results. Part I presents some general "best practices" techniques. Part II covers design-for-testability issues. In Part III, the author provides a few common pitfalls in performing the tests, and Part IV shows how to prepare the memories for testing.


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5 comments; last comment on 12/08/2014
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