Moore's Law – Does it Still Matter?

I suspect, were one to add up all the computing power available in the world today, one would find that it far exceeds our capability to use it. This does not mean we should be resting on our laurels any time soon, because there are a lot of people out there figuring out how to put all this unused capacity to work. If our capability ever does start catching up with capacity, we will find ourselves back in the days when we had to send data off and wait (days, sometimes) for the results to come back...

What limits our ability to use the capacity that is available is the human interface boundary. The human interface boundary is a moving target...

I have the sense that the Moore's law is rather a scientific/technological "obsession" than a "law". It's a kind of prediction that was made in the early years of technological evolution -named as a "law"- which was implemented till now and we are trying to keep it valid in the future (at least in the near future). So, the term "Moore's law" is overestimated and it should probably be replaced by the term "Moore's prediction".

Sooner or later, the further reduction and crowding of the electronic elements on a VLSI chip (e.g. a microprocessor) will come to an end -under the existing technology- as there are several issues (quantic phenomena) for sizes below nanoscale. Hence, in order to keep the Moore's law valid, we should evolve other technological ideas, like the 3d implementation of a VLSI chip (instead of a 2d implementation, which is valid till now) or more "clever" and efficient computer architectures. Our efforts could, also, lead to more exotic technologies like plasmonic or quantic computers.

Moore's Law died in 2004. The CTO of IBM gave the eulogy: "We lost scaling somewhere between 130 and 90 nanometers." It is why we do not have a 4 GHz Pentium to this day, after decades of Moore's law driven speed improvement. Technically, Moore's Law is still active: we are still shrinking the transistors. It is just that it no longer offers the performance improvements it once did.

At 130 nm, ~75% of the delay and power dissipation is in the metal, not in the transistors. This means that shrinking the transistors does not help power or speed. Worse, shrinking the die will make the function cheaper but also slower and hotter!

The reason is that the metal now has to shrink in thickness as well as width. For 180 nm and larger, shrinking the die did not change the relative resistance of the metal interconnects. The metal got narrower, but the transistors got smaller, and it all balanced out in a dimensionless manner. But at 130 nm, you have to start shrinking the metal in both width and height because the metal gets so narrow that it will tip over if you do not. Result: as you shrink, the relative resistance of the metal goes up. More resistance means more delay and more power loss in the metal. The shrunken die gets smaller, but also relatively slower and hotter.

It gets worse. Tiny transistors have rapidly increasing static leakage, to the point where the static leakage power is approaching the dynamic running power. And then there is the problem of hugely increased mask costs going from 180 nm to 40 nm and below.

So the sweet spot for average designs is somewhere between 180 and 130 nm. There are always exceptions to every rule. E.g. FPGAs can benefit from smaller transistors because the transistors are used for interconnect and have a significant impact on speed. But you need a specific reason to go much below 130 nm.

There are ways to incrementally improve the speed and power, such as halfnium oxide gates and copper interconnects, but these are one-time improvements independent of scaling. It does not affect the metal. In the future, some combination of superconductivity, nanotubes or graphene, etc. for the interconnects may improve the trade-offs, but that is not the way to bet at this time.