How to Design a Thyristor Gate Driver Circuit

I failed to see the scope (size) of the motor, or current, voltage values.

Unless they are very large devices they can be easily controlled with a common optocoupler SCR or Triac driver IC.

You mean this circuit?

I DOUBT this is meant to be used with a plain opto-coupler. Is there any commercial +230V isolation opto, that can handle 400Vac at the output (off state), and 0.5A?

We are talking about a huge opto for the smallest thyristor I was able to find.

What about semiconductor diode there? It is still like universal diode?

Well, diodes are made of semiconductors.

However, Universal Diode? There is no such a thing! There are different diodes for different applications, in terms: voltage rating, current rating, voltage drop, signal bandwidth, temperature range...

The only universal diode in the universe is time. It always flows forward.

I don't like the second circuit topology at all. There are no components dedicated to handling the flyback voltage of the primary windings for the coupling transformer. The other two circuits look plausible.

You also don't indicate what type of motor you are trying to drive nor the power source these SCR are supposed to apply to this motor.

Variable Frequency Drives (VFD) look simple but they are not as simple as most would think.

You are supposed to read THE Application Manual provided by your distributor. Specific aspects of design are covered there. Basic Power Electronics knowledge can be acquired from any book in the field.

For example, this one is from SEMICRON.

Chapter 4: Application Notes for Thyristors and Rectifier Diodes

"4.3. Drivers for thyristors" is what you need, but unless you have been doing this for +10 years, I would at least read the complete chapter.

Circuit 1 is a common topology.

Depending on your gate drive requirements you may not need the three parallel resistors. Use non inductive resistors to speed the current rise. The series RC on the input will give a good hard pulse for the first couple microseconds. Depending on your required dI/dt it may not be required. The series resistors in the gate leads will significantly reduce the gate drive, but will probably help share the current pulse to the gates of the two devices. No 2 SCRs have identical gate characteristics, and since the circuit is a current source the gate pulse will go to the SCR with the lowest impedance.

Normally I add a gate cathode resistor of about 100 to 300 ohms. It improves the SCR dv/dt characteristics and makes the gate circuit a little more noise immune - especially if you have sensitive gate SCRs.

Depending on the FET used, there may be a parasitic drain-source "zener" that can be used to absorb the pulse transformer inductive flyback.

The pulse transformer should be sized to handle the anticipated volt microseconds of the pulse(s). The higher the output impedance the larger the V usec needs to be. Consider the case of an open gate circuit - what is the waveform going to be? Consider an SCR with the highest gate voltage and resistance - what is the V usec?

Gate lead length is critical - a couple meters of twisted pair conductors can add a couple uH of inductance and totally wipe out the fast current rise of your drive circuit.

Personally I prefer a single pulse transformer per SCR device - it gives me better control of the individual gate signals.

All circuits - microsecond rise times are needed for SCR switching high di/dt loads. Unless you have low impedance bypass capacitor across DC supply to firing circuit, you may not get expected rise time. Circuit 1 looks like good design for quick voltage rise and high current [high gate drive] but I cannot read resistor values and correct (low leakage inductance) transformer parameters are essential.

Circuit 2 may need inductive spike voltage protection [see circuit 1] for MOSFET.

Circuit 3 might have a problem with fast turn-on of FET if R1 is too high. The significant capacitance of FET gate and "Miller Effect" feedback from drain can make the R1-C constant for FET turn-on long. The reverse voltage tolerance of LEDs is low - usually 3 volts spec - be carefull with "flyback" volts @ FET OFF.

The waveform and current at SCR gate must meet maker's requirement for rate of rise of voltage/current & peak current & duration of pulse - I would test with low inductance resistor in place of SCR gate of values which match lowest and highest gate V-I range tolerance from SCR spec - this will show magnitude of current. Ask the SCR maker how he measures gate drive. Do not forget -20 'C? to to max SCR junction temperature effects on gate V-I.

One cannot tell from your post if you need "high gate drive" for low inductance, high di/dt, SCR loads or if, being an inductive load di/dt is low and a slow rise just meeting max trigger current is good enough.

You are correct about the power supply "stiffness" .

Typically a switch mode power supply does not have much capacity for usec pulses.

We add significant capacitance with low ESR on the power supply. Without it the pulses are not supported. Board layout can also be critical - the pulse can be up to 10 amps for large SCRs - so if the traces are small it may handle the RMS current OK, but the resistance drop kills the signal.

You may want to consider the case of shorted leads - either together, or to ground, or to phase - it may damage your circuit in surprising ways.

On the same note, the SCR gate leads are at line potential - so your board must be laid out for the voltage between traces - it may be line to line potential between adjacent traces.

Good reference by IvanovXX.. in post #5. Very little about drive circuit, but lots about pulse transfo - which is a really important component.

Note that high performance drive circuits have 12 or 24V power, note gate drive is 3 amps, 3 volts 0.1 microsecond rise time at gate for big thyristor at high di/dt - 5 volt power shown on examples takes big volt step-up on trigger transfo & very high 5V currents to get high gate drive.

If driving two gates at once, ballast inductance/resistance must ensure required drive to highest gate volt device while the "lowest gate volt" device is on other secondary of transfo. Means actual volts at secondary must be 2 X minimum or more with difference lost across resistor.

Driving a slipring rotor is actually driving a transfo with variable coupling to stator. Short circuits and voltage surges on line side can give severe "kick-backs" to rotor.

Our drive circuits use 24volts as standard (Like circuit 1 but one circuit per SCR). It can be adjust to as high as 45 volts for "special circumstances". Some of the large SCRs (like 6 inches across) to achieve the max dI/dt rating can take up to 10 amps on the initial leading edge, then drop to 1 amp for the back porch. In a 3 phase bridge adding a small inductance in the line side of the bridge can significantly reduce the dI/dt and relieve the gate drive requirements. The high dI/dt is usually seen while in continuous conduction as the line commutates from one phase to the next, there is a momentary "short" between the phases. Most of the devices we see gate nicely with a 1 amp pulse, .1usec rise time. We control the rise time because if it is too short we find parasitic LC components in the gate leads will cause the circuit to ring badly. This problem appears more pronounced on pulse transformers that are "faster". Iron core laminated transformers appear to slow the rise and do not show ringing as badly.b The diodes need to be fast or the reverse recovery allows a lot of "back" current to flow.

For a production circuit there is no real cook book. You have to start with the fundamentals, layout your circuit, test with the components selected, adjust accordingly. It is not an afternoons project. Even component layout and length of leads to the SCR significantly impact performance. (I chuckle every time someone wants to use 3 meter long gate leads - an invitation for failure!)

Thank you for the interesting information, GW!

Being an ancient engineer, I reach for the "Westinghouse SCR Designers Handbook" (2nd ed. 1970) when I need to know about SCRs, mere 2" diameter then.

You are right about the 3 metres - that is 0.15 x wavelength for a 50 ohm coax line at 10 MHz - it must be treated as a transmission line with echos. Noting that 1/4 λ lines are used as transformers, getting the impedance matched so pulse energy actually goes into the gate rather than back into driver & transfo cannot be ignored.

For the benefit of "Original Post", which end of the wire should the diode be??

Circuit diagrams do not show if transfo end or SCR gate end is most efficient.

Thyristors are semiconductor devices that are specifically designed for use in high-power switching applications. Thyristors can operate only in the switching mode, where they act like either an open or closed switch and once triggered it will remain conducting.

...until the next zero crossing. That is why they are useless as DC switches.

Actually its until the next zero (± the pinch OFF threshold) current crossing. In theory an SCR might be used in a DC application to charge a capacitor or battery. I've never designed this but it might be done.

Please elaborate. I have had really bad luck attempting to switch DC power applied to anything when using a SSR device.

It's called forced commutation, specifically Class C commutation.

Much easier with IGBT

Those do work, and I have not had (as many) control issues with them, in my very limited experience.

True, but I didn't say it was easy, just doable.

Thyristors were used widely for motor drivers until the 80s. For the next 20 years GTOs replaced them. And since the beginning of this century most motor drives have been made with IGBTs.

I assume the only reasons someone would like to use a technology 2 generations older than the current one can be either for educational purposes, or for reusing components.

And they both do not pay off.