IC's containing multiple AND and OR ciruicts

Dont you use NOT-logical question especially when you are going to do some logic operations in designing. Microcontroller 8051 will solve your problem.

Can you get access to a programmer for blowing PALs and GALs etc (programmable array logic devices)?

I think johnDG is right on with this one. With all things considered, a programmable logic array is the best solution. If you are not equipped I would suggest contacting a local electronics tech school to get the device programed. They will usually help.

You should brush up on your Boolean logic fundamentals. There are several fundamental reasons that NAND and NOR gates are used instead of AND and OR. First it takes less transistors to make a NAND and NOR gate than an AND and OR gate. Second, by applying several gates of either a NAND or NOR gate one can fabricate all logic functions, but this cannot be done with having only the non-inverting gates of AND and OR.

Now you may find that the old circuitry that you previously used was so slow that race conditions were not a problem only because the brief logic contradictions were faster than the response of the old gates. You may find that new circuitry using an identical logic pattern produces new problems.

The number of gates that you require are extremely small today. I would expect that you can do all of your control easily with a single embedded microcontroller. You may still need a few discrete external gates to handle manual controls of enable/disable and the like.

To answer your question, you will find no more than four AND/NAND or NOR/OR gates on one chip, these would usually be 14 pin chips. You can still find several types of TTL logic and CMOS logic chips still available through distributors like Mouser, Allied, Newark, Jamesco and Digi Key.

I do agree that you probably could reduce the number of gates you need by using both non- and inverting type gates.

While an FPGA or micro are also alternatives, if you are not setup to handle these, it would likely be easier for you to go with logic chips instead.

Use PLD / FPGA for fast action or a PLC if you wish to program for slow action.

Try PLD or CPLDs.

I recommend you to use a microcontroler instead the TTL or CMOS logic tech. You might use the pic (www.microchip.com) and a software called flowpic easy to use. The microcontroler is about 3 or 4 bucks and power consumption will be less.

G'day ltcps,

As several others have recommended I believe the way to go would be to use a microcontroller. They really aren't that difficult to learn about and there are plenty of prototyping boards out there that you can use to learn on. If you can lock yourself away for a couple of days with something like the PICkit3 you should be competent enough to replace your circuit with a microcontroller. You may even find that you can get away with using a prototyping board for you application which will do away with any fabrication altogether.

From personal experience I can pretty much guarantee that once you get the hang of using microcontrollers you will be kicking yourself for not learning about them sooner.

Oh yes, using a microcontroller gives you the added ability of being able to change the functionality by just reprogramming it should you find you have problems or wish to add functionality at some time in the future.

Regards, masu

Thanks for the replys. Brings up new approaches that an old fart like me has not been exposed to.

Gives me a place to start and the micro processor gives the programmer in me a chance to play with the new toy.

Again, thanks a million.

Tom

In this case the use of a MICROCONTROLLER would be better and easier than a microprocessor. Contact us to help you in any way.

Do a Karnaugh map first to check the logic. It may end up being simpler than it first looked.

Back in the olden days, when I had a hairy amount of combinational logic to design, I would write a truth table for the logic, inputs and outputs, and burn the whole thing into a ROM... so I ended up with a couple of chips rather than a board full of logic.

Bill

"I would write a truth table for the logic, inputs and outputs, and burn the whole thing into a ROM."

I haven't seen that done for some time. You could also use data memory of a microcontroller to do the same thing with the added advantage of being able to reprogram it should you find you need to change something.

So very true. Back in those days though, Intel couldn't count to 8048 much less 8051. I thought about using a microcontroller, but if you have alot of outputs, they might have to be presented sequentially (one byte at a time for example) to a buffer register? which eats up clock cycles. And we don't know how many inputs and outputs are needed.

The ROMs I typically used were 82S123s or 82S129s (old Signetics parts). I don't even know if they are made anymore... certainly not by Signetics.

Did the Mosquito ever fly?

Bill

Dear Mark and Bill,

Working with uCs and uPs is all for beginners. Working with State Machine drives you to the limit of speed and imagination. These are meant for Royal challengers, the designers of the uCs and uPs itself and far beyond.

If you use ROM or RAM for solving LOGIC directly and have 36 inputs then you need 36 bit address in the ROM or RAM which is rather too big. Perhaps if you have few inputs and you have no time dependent feedback and no edge activated signals then this idea can be implemented. Using PROM that were fuse based now makes no sense unless you want to discover ancient History of design. I did use them before 1990. They are also part of the many old French fighter aircraft electronics.

If your outputs are injected into input then you do require a clock and a state or data latch and such device is called a State machine or Moore Machine.

You can solve a lot of fast logic using State Machine as decision is taken on a single clock.

This technology in enhanced design was used in bit slice processors, and almost all processors and Microcontrollers use State machine to decode instruction cycle. Reduced instruction set machine and single cycle machine work much in parallel and use less clock cycles or single clock cycle for a task.

You can use EEPROM or dual port SRAM to load the state codes.

My ST1006 delay timer is such design which generates 40G Byte programmable pattern using information in the form of millions of matrix scanned at 10MHz rate giving 100ns time for each state to change.I can also go up to 40MHz clock at best with discrete parts and few GHz in FPGA for the same design.

You need to have a clear vision of what you want to do and how to proceed with high speed data in time. To start with such design, first try out simple designs involving feedback and clock registers, comparators, fast gates along with code / decode memory.

I learnt my first State Machine design from Mr. Joltan, a German teacher who was part of the IAEA, UNO trainer team in mid 1988 in Santo Domingo, Dominican Republic, West Indies. Only less than 3 hours of his training made me specialist today and I design these supper machines for some task that otherwise look impossible to design with perfection. I could learn few words in Spanish Language during that training and met some nice university students over there who are still part of my memory.

It is worth for all young and old engineers to learn these very early designs of State Machines.

Remember how people used card punch paper rolls for knitting and weaving artistic cloths. Those perhaps were first designs of State Machine having memory data as punched holes on some hard paper.

Shyam, you're going off into the realms of fantasy here.

"If you use ROM or RAM for solving LOGIC directly and have 36 inputs ... " - where did the 36 inputs come from? Tom, please give some input here. How fast does the thing have to operate? Is there a need for fast and accurate timing at input or output?

I used fusible link PROMs and EPROMs for implementing address decoders, fast dividers and multipliers and several other applications back some years, and it's not an approach to be disregarded. For feedback, as you say - all you need is a bit of latching.

Are you just trying to sell us your "ST1006"?

I just can read "who knows more". If we see the original question he only asks about something really simple. In my own opinion lets quit this hard arguments and just help not to give the most complex solution. What's going on engineers? Let's do it simple! Marco

Again: "Tom, please give some input here."

For ROM based decoder of static LOGICAL states requires ADDRESS equal to inputs and data I/O equal to output and there is nothing new about it. PLDs do much better job and remove empty spaces. Number 36 was to give some idea on large number of inputs and you can have any number, nothing specific.

For speed in less than 1kHz, I suggested PLC which is industrial device ready to use and one can get for <$100. Microprocessor or Microcontroller are used in PLC so designing PLC is more complex than using a ready to use PLC.

PLC programming is simple Ladder Language and one can master it in few hours. uCs and uPs require a lot of knowledge that you all forget while suggesting. What is simple for you may not be all that simple for others.

I suggested three items, PLD, FPGA, and PLC and the last one for simple quick result. No one can produce faster results than PLC I suggested. see posting 6.

Many of you are expert in PLC programming so why not come up with some tutorial blog. This sure will be very valuable.

I get fund from Government for research and sell nothing. ST1006 is our research product for research by my engineers and other scientists in DAE in their time of flight experiments. It is a no-nonsense design with perfection that meets our research need. I referred to it because it is designed in a manner I stated. I do teach engineers so they can also use all that we have in the research lab. There is no shop here but we do have students club and store for hobby engineering and is called Robotics Club of India.

There are multiple ways to catch your nose and experience will tell a right way to proceed.