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An adage of the electronics industry states that shrinking costs money. As device geometries edge toward the limits of physics while wafer sizes approach the diameter of the earth, costs are spiraling out of control. Building the next generation of fabs will likely top $12 billion. EUV lithography inspection tool development alone is estimated at $300 million. Combined with the constant pressure to reduce chip prices, how can industry sustain such a pattern? How will you develop your next-generation devices? What tools will you need? What new technologies will you require? Who will pay for it all?
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